Project - Router Design Document
In preparation for the 4-port IP router implementation in hardware, you will first create a design document detailing the hardware router's feature set, architecture, implementation, and testing. The design document will be continually updated for the remainder of the class as your implementation evolves. Assuming that your design document is updated regularly, it should be a simple task to merge this document with the Software IP Router project report and produce the final report for the course.
The following resources will be useful in writing this hardware design document:
- Project - Hardware IP Router - The router project details the functionality that the hardware component of your router must support. This functionality must be fully described in this design document.
- Register Map - The register map details the control interface between software and hardware that your router must support in order to allow interoperability with other groups.
- Project - Software Router - The software project details all of the functionality that your future integrated hardware/software router must support. It is expected that this Hardware design document and the Software project report will share some common elements.
For this project, you must produce a clear, complete, and unambiguous hardware design document. The document should contain:
- The division of labor between group members for this project, as described in the project honor code policy
- A brief introduction describing what this design document is about
- A discussion of the feature set of your router, including:
- What functions will be performed in the hardware data plane?
- What functions will not be performed in the hardware data plane?
- An architectural description of your router, including:
- Block diagram(s) that show how you have partitioned your design into different functional modules
- Written description that details the functionality of each module, and its expectations and dependencies on adjacent modules
- High-level pseudo-code for any complicated algorithms that are implemented in hardware. Specifically, the following two functions at minimum must be described:
- Longest-prefix match algorithm
- Incoming packet inspection and decoding algorithm
- Block diagram(s) that show the data and control flow between your modules
- Block diagram(s) and written descriptions that show the buffering/congestion points in your design. (When preparing this, make sure to answer the question "where can packets be lost or delayed due to lack of resources?")
- Written description and/or tables detailing any internal state (registers, counters, etc.) that your router maintains, regardless of whether that state is visible to software as part of the pre-defined Register Map.
- A discussion of how you intend to test and verify your design
- What tests will you run in the simulator?
- What tests will you run on real hardware?
- How will you implement these tests? (i.e. using TCPdump, Perl libraries, Dumbnet, etc...)
- Figures should be numbered
- Figures should be referenced / integrated into the supporting text
- Figures should be computer-drawn unless approved in advance
- Page numbers should be provided
The design document will be graded out of 100 points.
For submission, the final document should be converted to PDF format and emailed to the course instructors.